The present invention relates to semiconductor structures, and more specifically, to forming nanosheet transistors on bulk material.
Fin field effect transistors (FinFETs) are an emerging technology which may provide solutions to field effect transistor (FET) scaling problems at, and below, the 22 nm node. FinFET structures may include at least a narrow semiconductor fin gated on at least two sides of each of the semiconductor fin, as well as a source region and a drain region adjacent to the fin on opposite sides of the gate. FinFET structures having n-type source and drain regions may be referred to as nFinFETs, and FinFET structures having p-type source and drain regions may be referred to as pFinFETs.
The degree of control of electronic transport in the channel region of a field effect transistor is a predominant factor determining the level of leakage currents. A wraparound gate, such as in a nanosheet field effect transistor, is a configuration that enhances control of the electronic transport in the channel region of a field effect transistor. However, integration schemes employ a semiconductor-on-insulator (SOI) substrate increase the cost of production because SOI substrates are more expensive than bulk substrates.